CXMT’s DRAM 4F² and vertical transistor push raises questions for memory leaders

Changxin Memory Technologies, or CXMT, said it has made major progress in DRAM devices, 4F² cell architecture and hybrid bonding, a set of developments that quickly shifted investor attention to the global memory market. The concern outlined in the source report is straightforward: if a Chinese DRAM maker can break through a core technology barrier and pair that with a structure that lifts bit output per wafer, effective supply could rise faster than many had expected. The report focuses on two changes. One is the move from the mainstream 6F² cell layout to 4F². The other is CXMT’s self-developed VSG, short for Vertical Surrounded Gate, a vertical gate-all-around style transistor that supports that layout. Under the same process node, a 4F² cell is described as roughly one-third smaller than a 6F² cell, which in theory allows about 50% more memory cells in the same area, though chip-level gains would be lower once peripheral circuits are included. The analysis then walks through how a DRAM 1T1C cell works, why vertical transistors matter, where 4F² manufacturing becomes difficult, and how the timetable at Samsung, SK hynix and Micron compares with CXMT’s announcement. The source argues that near-term industry fundamentals may not change much, but the medium-term supply outlook after 2028 could look different if 4F² reaches production and yields scale.